Winter School on Digital VLSI Design (WSDVD 2013) from Dec16-30, 2013 in three phases

The Institution of Engineers (India), Ranchi is going to organize short term course Winter School on Digital VLSI Design (WSDVD_2013) in three phases. Program schedules are as follows:

  • Phase1: From Dec 16th to 20th, 2013 (UG, PG & Faculty)
  • Phase2: From Dec 21st to 25th, 2013 (UG, PG & Faculty)
  • Phase3: From Dec 26th to 30th, 2013 (UG, PG & Faculty)

Download Registration Form

UG: Under Graduate (BE / B.Tech. in relevant area)
PG: Post Graduate (M.E./M.Tech.(ECE/CS/EEE)./M.Sc.(Electronics/Phy & Elec/CS))
Faculty: Faculty/Scientist/ RS (research scholar)/ Industry person in relevant area.

This course is designed based on the demands of industries, academia and R&D for trained man power in Digital and Analog VLSI Design. This course will cover theory with practical, current available advanced technology tools. Lectures will be delivered by Dr. Vijay Nath, VLSI Design Group, Department of Electronics & Communication Engineering, Birla Institute of Technology, Mesra, Ranchi and some other experts from reputed institutions & industries. I request you to circulate this notice among the UG & PG students, faculty members/scientists/research scholars, and nominate the same from your premier institute to attend Winter School on Digital VLSI Design (WSDVD_2013). In this course preference will be given to faculty members, industry persons and highly interested students.

WSDVD_2013 Course Objective : On successful completion, the learners will be able to effectively work on: Analog VLSI Design, Digital VLSI Design, CMOS Digital Logic Design, SPICE Level Simulation and Verification, Schematic Level Design & Analysis, Layout Design &Verification, Switching Action of the Transistors used in IC, VHDL & Verilog programming, RTL Design, Logic Level Design, Architectural Design, Circuit Level Design, Xilinx’s Simulation, Verification & Process to download on FPGA/CPLD kit, Spartan-3E, Mini project in VLSI.